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Support Mod 10 mov

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This commit is contained in:
Takashi Kokubun 2023-01-07 14:26:38 -08:00
parent 9ef04f5636
commit f4cf737af8
2 changed files with 14 additions and 7 deletions
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19
lib/ruby_vm/mjit/assembler.rb
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@ -17,7 +17,7 @@ module RubyVM::MJIT
class ModRM < Data.define(:mod, :reg, :rm); end class ModRM < Data.define(:mod, :reg, :rm); end
Mod00 = 0b00 # Mod 00: [reg] Mod00 = 0b00 # Mod 00: [reg]
Mod01 = 0b01 # Mod 01: [reg]+disp8 Mod01 = 0b01 # Mod 01: [reg]+disp8
Mod10 = 0b10 # Mod 10: [reg]+disp16 Mod10 = 0b10 # Mod 10: [reg]+disp32
Mod11 = 0b11 # Mod 11: reg Mod11 = 0b11 # Mod 11: reg
# REX = 0100WR0B # REX = 0100WR0B
@ -212,6 +212,16 @@ module RubyVM::MJIT
mod_rm: ModRM[mod: Mod01, reg: dst_reg, rm: src_reg], mod_rm: ModRM[mod: Mod01, reg: dst_reg, rm: src_reg],
disp: src_disp, disp: src_disp,
) )
# MOV r64, r/m64 (Mod 10: [reg]+disp16)
in [Symbol => src_reg, Integer => src_disp] if r64?(dst_reg) && r64?(src_reg) && imm32?(src_disp)
# REX.W + 8B /r
# RM: Operand 1: ModRM:reg (w), Operand 2: ModRM:r/m (r)
insn(
prefix: REX_W,
opcode: 0x8b,
mod_rm: ModRM[mod: Mod10, reg: dst_reg, rm: src_reg],
disp: imm32(src_disp),
)
# MOV r64, r/m64 (Mod 11: reg) # MOV r64, r/m64 (Mod 11: reg)
in Symbol => src_reg if r64?(dst_reg) && r64?(src_reg) in Symbol => src_reg if r64?(dst_reg) && r64?(src_reg)
# REX.W + 8B /r # REX.W + 8B /r
@ -473,10 +483,7 @@ module RubyVM::MJIT
@bytes.push(mod_rm_byte) @bytes.push(mod_rm_byte)
end end
if disp if disp
unless imm8?(disp) # TODO: support displacement in 2 or 4 bytes as well @bytes.push(*Array(disp))
raise NotImplementedError, "not-implemented disp: #{disp}"
end
@bytes.push(disp)
end end
if imm if imm
@bytes.push(*imm) @bytes.push(*imm)
@ -583,7 +590,7 @@ module RubyVM::MJIT
end end
def imm64?(imm) def imm64?(imm)
(-0x8000_0000_0000_0000..0x7fff_ffff_ffff_ffff).include?(imm) # TODO: consider uimm (-0x8000_0000_0000_0000..0xffff_ffff_ffff_ffff).include?(imm)
end end
def r32?(reg) def r32?(reg)

2
lib/ruby_vm/mjit/compiler.rb
View File

@ -168,7 +168,7 @@ module RubyVM::MJIT
# #
# @param asm [RubyVM::MJIT::Assembler] # @param asm [RubyVM::MJIT::Assembler]
def compile_prologue(asm) def compile_prologue(asm)
asm.comment('MJIT entry') asm.comment('MJIT entry point')
# Save callee-saved registers used by JITed code # Save callee-saved registers used by JITed code
asm.push(CFP) asm.push(CFP)