From d1075b72c819ee537bde8a302340c4b837402a76 Mon Sep 17 00:00:00 2001 From: hsbt Date: Tue, 12 Aug 2014 03:59:39 +0000 Subject: [PATCH] * vm_exec.c: improve performance in ppc64 arch. [ruby-core:63437] [Feature #9997] git-svn-id: svn+ssh://ci.ruby-lang.org/ruby/trunk@47149 b2dd03c8-39d4-4d8f-98ff-823fe69b080e --- ChangeLog | 5 +++++ vm_exec.c | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/ChangeLog b/ChangeLog index 6f62f68d4f..730969de43 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +Tue Aug 12 12:57:28 2014 SHIBATA Hiroshi + + * vm_exec.c: improve performance in ppc64 arch. + [ruby-core:63437] [Feature #9997] + Tue Aug 12 12:14:52 2014 Akira Matsuda * lib/fileutils.rb: fix typo. diff --git a/vm_exec.c b/vm_exec.c index 3a29136b1e..330d35a194 100644 --- a/vm_exec.c +++ b/vm_exec.c @@ -24,6 +24,9 @@ static void vm_analysis_insn(int insn); #elif defined(__GNUC__) && defined(__i386__) #define DECL_SC_REG(type, r, reg) register type reg_##r __asm__("e" reg) +#elif defined(__GNUC__) && defined(__powerpc64__) +#define DECL_SC_REG(type, r, reg) register type reg_##r __asm__("r" reg) + #else #define DECL_SC_REG(type, r, reg) register type reg_##r #endif @@ -70,6 +73,11 @@ vm_exec_core(rb_thread_t *th, VALUE initial) # endif #define USE_MACHINE_REGS 1 +#elif defined(__GNUC__) && defined(__powerpc64__) + DECL_SC_REG(VALUE *, pc, "14"); + DECL_SC_REG(rb_control_frame_t *, cfp, "15"); +#define USE_MACHINE_REGS 1 + #else register rb_control_frame_t *reg_cfp; VALUE *reg_pc;