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Move registers into header and make them static

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We were leaking these as global symbols and were having linking errors
with Clang 12.
This commit is contained in:
Alan Wu 2020-10-03 18:35:15 -04:00
parent e3cd43e2bc
commit 7fbf6d4019
2 changed files with 66 additions and 144 deletions
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78
ujit_asm.c
View File

@ -8,84 +8,6 @@
#include "ujit_asm.h"
// Dummy none/null operand
const x86opnd_t NO_OPND = { OPND_NONE, 0, .imm = 0 };
// Instruction pointer
const x86opnd_t RIP = { OPND_REG, 64, .reg = { REG_IP, 5 }};
// 64-bit GP registers
const x86opnd_t RAX = { OPND_REG, 64, .reg = { REG_GP, 0 }};
const x86opnd_t RCX = { OPND_REG, 64, .reg = { REG_GP, 1 }};
const x86opnd_t RDX = { OPND_REG, 64, .reg = { REG_GP, 2 }};
const x86opnd_t RBX = { OPND_REG, 64, .reg = { REG_GP, 3 }};
const x86opnd_t RSP = { OPND_REG, 64, .reg = { REG_GP, 4 }};
const x86opnd_t RBP = { OPND_REG, 64, .reg = { REG_GP, 5 }};
const x86opnd_t RSI = { OPND_REG, 64, .reg = { REG_GP, 6 }};
const x86opnd_t RDI = { OPND_REG, 64, .reg = { REG_GP, 7 }};
const x86opnd_t R8 = { OPND_REG, 64, .reg = { REG_GP, 8 }};
const x86opnd_t R9 = { OPND_REG, 64, .reg = { REG_GP, 9 }};
const x86opnd_t R10 = { OPND_REG, 64, .reg = { REG_GP, 10 }};
const x86opnd_t R11 = { OPND_REG, 64, .reg = { REG_GP, 11 }};
const x86opnd_t R12 = { OPND_REG, 64, .reg = { REG_GP, 12 }};
const x86opnd_t R13 = { OPND_REG, 64, .reg = { REG_GP, 13 }};
const x86opnd_t R14 = { OPND_REG, 64, .reg = { REG_GP, 14 }};
const x86opnd_t R15 = { OPND_REG, 64, .reg = { REG_GP, 15 }};
// 32-bit GP registers
const x86opnd_t EAX = { OPND_REG, 32, .reg = { REG_GP, 0 }};
const x86opnd_t ECX = { OPND_REG, 32, .reg = { REG_GP, 1 }};
const x86opnd_t EDX = { OPND_REG, 32, .reg = { REG_GP, 2 }};
const x86opnd_t EBX = { OPND_REG, 32, .reg = { REG_GP, 3 }};
const x86opnd_t ESP = { OPND_REG, 32, .reg = { REG_GP, 4 }};
const x86opnd_t EBP = { OPND_REG, 32, .reg = { REG_GP, 5 }};
const x86opnd_t ESI = { OPND_REG, 32, .reg = { REG_GP, 6 }};
const x86opnd_t EDI = { OPND_REG, 32, .reg = { REG_GP, 7 }};
const x86opnd_t R8D = { OPND_REG, 32, .reg = { REG_GP, 8 }};
const x86opnd_t R9D = { OPND_REG, 32, .reg = { REG_GP, 9 }};
const x86opnd_t R10D = { OPND_REG, 32, .reg = { REG_GP, 10 }};
const x86opnd_t R11D = { OPND_REG, 32, .reg = { REG_GP, 11 }};
const x86opnd_t R12D = { OPND_REG, 32, .reg = { REG_GP, 12 }};
const x86opnd_t R13D = { OPND_REG, 32, .reg = { REG_GP, 13 }};
const x86opnd_t R14D = { OPND_REG, 32, .reg = { REG_GP, 14 }};
const x86opnd_t R15D = { OPND_REG, 32, .reg = { REG_GP, 15 }};
// 16-bit GP registers
const x86opnd_t AX = { OPND_REG, 16, .reg = { REG_GP, 0 }};
const x86opnd_t CX = { OPND_REG, 16, .reg = { REG_GP, 1 }};
const x86opnd_t DX = { OPND_REG, 16, .reg = { REG_GP, 2 }};
const x86opnd_t BX = { OPND_REG, 16, .reg = { REG_GP, 3 }};
const x86opnd_t SP = { OPND_REG, 16, .reg = { REG_GP, 4 }};
const x86opnd_t BP = { OPND_REG, 16, .reg = { REG_GP, 5 }};
const x86opnd_t SI = { OPND_REG, 16, .reg = { REG_GP, 6 }};
const x86opnd_t DI = { OPND_REG, 16, .reg = { REG_GP, 7 }};
const x86opnd_t R8W = { OPND_REG, 16, .reg = { REG_GP, 8 }};
const x86opnd_t R9W = { OPND_REG, 16, .reg = { REG_GP, 9 }};
const x86opnd_t R10W = { OPND_REG, 16, .reg = { REG_GP, 10 }};
const x86opnd_t R11W = { OPND_REG, 16, .reg = { REG_GP, 11 }};
const x86opnd_t R12W = { OPND_REG, 16, .reg = { REG_GP, 12 }};
const x86opnd_t R13W = { OPND_REG, 16, .reg = { REG_GP, 13 }};
const x86opnd_t R14W = { OPND_REG, 16, .reg = { REG_GP, 14 }};
const x86opnd_t R15W = { OPND_REG, 16, .reg = { REG_GP, 15 }};
// 8-bit GP registers
const x86opnd_t AL = { OPND_REG, 8, .reg = { REG_GP, 0 }};
const x86opnd_t CL = { OPND_REG, 8, .reg = { REG_GP, 1 }};
const x86opnd_t DL = { OPND_REG, 8, .reg = { REG_GP, 2 }};
const x86opnd_t BL = { OPND_REG, 8, .reg = { REG_GP, 3 }};
const x86opnd_t SPL = { OPND_REG, 8, .reg = { REG_GP, 4 }};
const x86opnd_t BPL = { OPND_REG, 8, .reg = { REG_GP, 5 }};
const x86opnd_t SIL = { OPND_REG, 8, .reg = { REG_GP, 6 }};
const x86opnd_t DIL = { OPND_REG, 8, .reg = { REG_GP, 7 }};
const x86opnd_t R8B = { OPND_REG, 8, .reg = { REG_GP, 8 }};
const x86opnd_t R9B = { OPND_REG, 8, .reg = { REG_GP, 9 }};
const x86opnd_t R10B = { OPND_REG, 8, .reg = { REG_GP, 10 }};
const x86opnd_t R11B = { OPND_REG, 8, .reg = { REG_GP, 11 }};
const x86opnd_t R12B = { OPND_REG, 8, .reg = { REG_GP, 12 }};
const x86opnd_t R13B = { OPND_REG, 8, .reg = { REG_GP, 13 }};
const x86opnd_t R14B = { OPND_REG, 8, .reg = { REG_GP, 14 }};
const x86opnd_t R15B = { OPND_REG, 8, .reg = { REG_GP, 15 }};
// Compute the number of bits needed to encode a signed value
size_t sig_imm_size(int64_t imm)
{

132
ujit_asm.h
View File

@ -132,82 +132,82 @@ typedef struct X86Opnd
} x86opnd_t;
// Dummy none/null operand
const x86opnd_t NO_OPND;
static const x86opnd_t NO_OPND = { OPND_NONE, 0, .imm = 0 };
// Instruction pointer
const x86opnd_t RIP;
static const x86opnd_t RIP = { OPND_REG, 64, .reg = { REG_IP, 5 }};
// 64-bit GP registers
const x86opnd_t RAX;
const x86opnd_t RCX;
const x86opnd_t RDX;
const x86opnd_t RBX;
const x86opnd_t RBP;
const x86opnd_t RSP;
const x86opnd_t RSI;
const x86opnd_t RDI;
const x86opnd_t R8;
const x86opnd_t R9;
const x86opnd_t R10;
const x86opnd_t R11;
const x86opnd_t R12;
const x86opnd_t R13;
const x86opnd_t R14;
const x86opnd_t R15;
static const x86opnd_t RAX = { OPND_REG, 64, .reg = { REG_GP, 0 }};
static const x86opnd_t RCX = { OPND_REG, 64, .reg = { REG_GP, 1 }};
static const x86opnd_t RDX = { OPND_REG, 64, .reg = { REG_GP, 2 }};
static const x86opnd_t RBX = { OPND_REG, 64, .reg = { REG_GP, 3 }};
static const x86opnd_t RSP = { OPND_REG, 64, .reg = { REG_GP, 4 }};
static const x86opnd_t RBP = { OPND_REG, 64, .reg = { REG_GP, 5 }};
static const x86opnd_t RSI = { OPND_REG, 64, .reg = { REG_GP, 6 }};
static const x86opnd_t RDI = { OPND_REG, 64, .reg = { REG_GP, 7 }};
static const x86opnd_t R8 = { OPND_REG, 64, .reg = { REG_GP, 8 }};
static const x86opnd_t R9 = { OPND_REG, 64, .reg = { REG_GP, 9 }};
static const x86opnd_t R10 = { OPND_REG, 64, .reg = { REG_GP, 10 }};
static const x86opnd_t R11 = { OPND_REG, 64, .reg = { REG_GP, 11 }};
static const x86opnd_t R12 = { OPND_REG, 64, .reg = { REG_GP, 12 }};
static const x86opnd_t R13 = { OPND_REG, 64, .reg = { REG_GP, 13 }};
static const x86opnd_t R14 = { OPND_REG, 64, .reg = { REG_GP, 14 }};
static const x86opnd_t R15 = { OPND_REG, 64, .reg = { REG_GP, 15 }};
// 32-bit GP registers
const x86opnd_t EAX;
const x86opnd_t ECX;
const x86opnd_t EDX;
const x86opnd_t EBX;
const x86opnd_t EBP;
const x86opnd_t ESP;
const x86opnd_t ESI;
const x86opnd_t EDI;
const x86opnd_t R8D;
const x86opnd_t R9D;
const x86opnd_t R10D;
const x86opnd_t R11D;
const x86opnd_t R12D;
const x86opnd_t R13D;
const x86opnd_t R14D;
const x86opnd_t R15D;
static const x86opnd_t EAX = { OPND_REG, 32, .reg = { REG_GP, 0 }};
static const x86opnd_t ECX = { OPND_REG, 32, .reg = { REG_GP, 1 }};
static const x86opnd_t EDX = { OPND_REG, 32, .reg = { REG_GP, 2 }};
static const x86opnd_t EBX = { OPND_REG, 32, .reg = { REG_GP, 3 }};
static const x86opnd_t ESP = { OPND_REG, 32, .reg = { REG_GP, 4 }};
static const x86opnd_t EBP = { OPND_REG, 32, .reg = { REG_GP, 5 }};
static const x86opnd_t ESI = { OPND_REG, 32, .reg = { REG_GP, 6 }};
static const x86opnd_t EDI = { OPND_REG, 32, .reg = { REG_GP, 7 }};
static const x86opnd_t R8D = { OPND_REG, 32, .reg = { REG_GP, 8 }};
static const x86opnd_t R9D = { OPND_REG, 32, .reg = { REG_GP, 9 }};
static const x86opnd_t R10D = { OPND_REG, 32, .reg = { REG_GP, 10 }};
static const x86opnd_t R11D = { OPND_REG, 32, .reg = { REG_GP, 11 }};
static const x86opnd_t R12D = { OPND_REG, 32, .reg = { REG_GP, 12 }};
static const x86opnd_t R13D = { OPND_REG, 32, .reg = { REG_GP, 13 }};
static const x86opnd_t R14D = { OPND_REG, 32, .reg = { REG_GP, 14 }};
static const x86opnd_t R15D = { OPND_REG, 32, .reg = { REG_GP, 15 }};
// 16-bit GP registers
const x86opnd_t AX;
const x86opnd_t CX;
const x86opnd_t DX;
const x86opnd_t BX;
const x86opnd_t SP;
const x86opnd_t BP;
const x86opnd_t SI;
const x86opnd_t DI;
const x86opnd_t R8W;
const x86opnd_t R9W;
const x86opnd_t R10W;
const x86opnd_t R11W;
const x86opnd_t R12W;
const x86opnd_t R13W;
const x86opnd_t R14W;
const x86opnd_t R15W;
static const x86opnd_t AX = { OPND_REG, 16, .reg = { REG_GP, 0 }};
static const x86opnd_t CX = { OPND_REG, 16, .reg = { REG_GP, 1 }};
static const x86opnd_t DX = { OPND_REG, 16, .reg = { REG_GP, 2 }};
static const x86opnd_t BX = { OPND_REG, 16, .reg = { REG_GP, 3 }};
static const x86opnd_t SP = { OPND_REG, 16, .reg = { REG_GP, 4 }};
static const x86opnd_t BP = { OPND_REG, 16, .reg = { REG_GP, 5 }};
static const x86opnd_t SI = { OPND_REG, 16, .reg = { REG_GP, 6 }};
static const x86opnd_t DI = { OPND_REG, 16, .reg = { REG_GP, 7 }};
static const x86opnd_t R8W = { OPND_REG, 16, .reg = { REG_GP, 8 }};
static const x86opnd_t R9W = { OPND_REG, 16, .reg = { REG_GP, 9 }};
static const x86opnd_t R10W = { OPND_REG, 16, .reg = { REG_GP, 10 }};
static const x86opnd_t R11W = { OPND_REG, 16, .reg = { REG_GP, 11 }};
static const x86opnd_t R12W = { OPND_REG, 16, .reg = { REG_GP, 12 }};
static const x86opnd_t R13W = { OPND_REG, 16, .reg = { REG_GP, 13 }};
static const x86opnd_t R14W = { OPND_REG, 16, .reg = { REG_GP, 14 }};
static const x86opnd_t R15W = { OPND_REG, 16, .reg = { REG_GP, 15 }};
// 8-bit GP registers
const x86opnd_t AL;
const x86opnd_t CL;
const x86opnd_t DL;
const x86opnd_t BL;
const x86opnd_t SPL;
const x86opnd_t BPL;
const x86opnd_t SIL;
const x86opnd_t DIL;
const x86opnd_t R8B;
const x86opnd_t R9B;
const x86opnd_t R10B;
const x86opnd_t R11B;
const x86opnd_t R12B;
const x86opnd_t R13B;
const x86opnd_t R14B;
const x86opnd_t R15B;
static const x86opnd_t AL = { OPND_REG, 8, .reg = { REG_GP, 0 }};
static const x86opnd_t CL = { OPND_REG, 8, .reg = { REG_GP, 1 }};
static const x86opnd_t DL = { OPND_REG, 8, .reg = { REG_GP, 2 }};
static const x86opnd_t BL = { OPND_REG, 8, .reg = { REG_GP, 3 }};
static const x86opnd_t SPL = { OPND_REG, 8, .reg = { REG_GP, 4 }};
static const x86opnd_t BPL = { OPND_REG, 8, .reg = { REG_GP, 5 }};
static const x86opnd_t SIL = { OPND_REG, 8, .reg = { REG_GP, 6 }};
static const x86opnd_t DIL = { OPND_REG, 8, .reg = { REG_GP, 7 }};
static const x86opnd_t R8B = { OPND_REG, 8, .reg = { REG_GP, 8 }};
static const x86opnd_t R9B = { OPND_REG, 8, .reg = { REG_GP, 9 }};
static const x86opnd_t R10B = { OPND_REG, 8, .reg = { REG_GP, 10 }};
static const x86opnd_t R11B = { OPND_REG, 8, .reg = { REG_GP, 11 }};
static const x86opnd_t R12B = { OPND_REG, 8, .reg = { REG_GP, 12 }};
static const x86opnd_t R13B = { OPND_REG, 8, .reg = { REG_GP, 13 }};
static const x86opnd_t R14B = { OPND_REG, 8, .reg = { REG_GP, 14 }};
static const x86opnd_t R15B = { OPND_REG, 8, .reg = { REG_GP, 15 }};
// Memory operand with base register and displacement/offset
x86opnd_t mem_opnd(size_t num_bits, x86opnd_t base_reg, int32_t disp);