14 Commits

Author SHA1 Message Date
Lucie Gérard
4c83657448 Add REUSE.toml files
Those files are read by reuse to complement or override the copyright
and licensing information found in file.

The use of REUSE.toml files was introduced in REUSE version 3.1.0a1.
This reuse version is compatible with reuse specification
version 3.2 [1].
With this commit's files,
* The SPDX document generated by reuse spdx conforms to SPDX 2.3,
* The reuse lint command reports that the Qt project is reuse compliant.

[1]: https://reuse.software/spec-3.2/

Task-number: QTBUG-124453
Task-number: QTBUG-125211
Pick-to: 6.8
Change-Id: I01023e862607777a5e710669ccd28bbf56091097
Reviewed-by: Edward Welbourne <edward.welbourne@qt.io>
Reviewed-by: Joerg Bornemann <joerg.bornemann@qt.io>
2024-11-05 14:36:16 +01:00
Thiago Macieira
54c24313fe qsimd_x86: disable the requirement that CPUs must have RNGs
Intel CPUs have had this since 2013 (Ivy Bridge), but some older
Bulldozer AMD CPUs appear to be missing it. This creates a mismatch
between when the __haswell__ macro gets declared in qsimd_p.h and the
runtime check using the CpuArchHaswell value. That in turn creates a
condition where qInitDrawhelperFunctions() in qdrawhelper.cpp leaves the
memfill pointers set to null.

#elif defined(__SSE2__)
#  ifndef __haswell__
    qt_memfill32 = qt_memfill32_sse2;
    qt_memfill64 = qt_memfill64_sse2;
#  endif
...
#if defined(QT_COMPILER_SUPPORTS_AVX2)
    if (qCpuHasFeature(ArchHaswell)) {
        qt_memfill32 = qt_memfill32_avx2;
        qt_memfill64 = qt_memfill64_avx2;

It does this so the qt_memfillXX_sse2 functions don't have to be defined
anywhere, so the QtGui build won't carry unnecessary dead code.

This is old code (from Qt 4.x) and several improvements I've made for
QtCore are not applied yet. My work for qSimdDispatcher[1] isn't
complete: it might have avoided this problem here, but it would also
have required major work for the draw helpers to work in the first
place.

[1] https://codereview.qt-project.org/c/qt/qtbase/+/537384

Pick-to: 6.8 6.7 6.5 6.2
Fixes: QTBUG-129193
Change-Id: Ia427a9e502b0fb46b2bdfffda8e2131b7091c9e9
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2024-09-25 00:56:08 +00:00
Thiago Macieira
f89c4c4f8f qsimd_x86: update from upstream and enable a few more features
After https://github.com/opendcdiag/opendcdiag/pull/223.

Enabled for Qt:
* waitpkg
* RAO (Remote Atomic Operations)
* CMPccXADD
* avxifma
* LAM (Linear Address Masking)

Disabled:
* AVX-512 VNNI

Change-Id: I5f7f427ded124479baa6fffd1760c35ed5b2adbb
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2023-05-26 16:22:22 -07:00
Thiago Macieira
718dae8e0b x86simdgen: update the Makefile to include the copyright in the .cpp
Drive-by include "DO NOT EDIT" in both files.

Change-Id: Ib5ce7a497e034ebabb2cfffd1762bf1d4ce737eb
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2023-05-26 16:22:15 -07:00
Lucie Gérard
05fc3aef53 Use SPDX license identifiers
Replace the current license disclaimer in files by
a SPDX-License-Identifier.
Files that have to be modified by hand are modified.
License files are organized under LICENSES directory.

Task-number: QTBUG-67283
Change-Id: Id880c92784c40f3bbde861c0d93f58151c18b9f1
Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org>
Reviewed-by: Lars Knoll <lars.knoll@qt.io>
Reviewed-by: Jörg Bornemann <joerg.bornemann@qt.io>
2022-05-16 16:37:38 +02:00
Thiago Macieira
3bcd6026ed util/x86simdgen: update with the copyright header
Matching update done in https://github.com/opendcdiag/opendcdiag/pull/78

Change-Id: I5ff8e16fcdcb4ffd9ab6fffd16ec02591cb5ed70
Reviewed-by: Jörg Bornemann <joerg.bornemann@qt.io>
2022-05-06 10:27:18 -07:00
Edward Welbourne
681bef22a7 Fix generation of qsimd_x86 files to require no hand-editing
Recent fixes to include the "We mean it" comment in the header also
lead to that comment appearing in the generated .cpp file, which also
lacked the "This is a generated file. DO NOT EDIT." comment. The
generated header also lacked a blank line after the "We mean it"
comment, so include that (and take it out, too, in the .cpp). The
"Please see" line of the "DO NOT EDIT" comment also used the name of
the generator script as seen from the Makefile that drives the
regeneration; replace this with the README.md file that actually
explains how to regenerate the files in corelib/global/.

This amends commit 71af0d7059d47a199e1d26de6573d6a5038caa30
and commit b852584556bec3750bad7fac984b6fc5af4c870f

Change-Id: I4b5b4dbef5954819632bb625d1914a9ec46e15d9
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
2022-04-07 23:04:04 +02:00
Kai Köhne
71af0d7059 Re-add missing 'we mean it' header
This got lost in commit b852584556bec3750bad7fac984b6fc5af4c870f .
Also augment util/x86simdgen/header so that the header is
automatically included when qsimd_x86_p.h is re-generated.

Change-Id: I3e59b983f78b8c1aced3757e1aa5dceb6d653d97
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
2022-03-07 14:04:25 +01:00
Thiago Macieira
b2298b7e94 qsimd_p.h: let the generator script generate the ARCH target strings
__attribute__((target("arch=xxxx"))) does not work because the compilers
(GCC at least) don't test the CPU features that they are targeting, so
we keep getting "inline failed" compiler errors.

GCC bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90129

Upstream patch: https://github.com/opendcdiag/opendcdiag/pull/59

Change-Id: I6fcda969a9e9427198bffffd16cea09fda4406d2
Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org>
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2022-02-19 13:40:21 -08:00
Thiago Macieira
b852584556 qsimd: update the generator script from OpenDCDiag
I'd been making changes to that and improving it for the past 2 years
without bringing it back into Qt.

The list of features is mostly the same, except:
- removed TSX features
- removed features specific to Xeon Phi processors
- added CET and AVX512FP16 features
- added the bit for hybrid CPU detection

See matching update at https://github.com/opendcdiag/opendcdiag/pull/49

Change-Id: I6fcda969a9e9427198bffffd16ce860b5a38aece
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2022-02-18 15:46:41 -08:00
Lars Knoll
f2f32b88b8 Move qsimd* from corelib/tools to corelib/global
It's not used in tools at all and fits a lot better in global.

Also fix the qsimd_x86* files to have a proper copyright
header.

Change-Id: Id3d8e7cfcd7769a1ca9f3d8cf6d357a31a99ba40
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Reviewed-by: Lars Knoll <lars.knoll@qt.io>
2020-03-26 09:15:32 +01:00
Thiago Macieira
12cf0dbfe5 SIMD: Change the way we declare constants for x86
We need to use macros because MSVC is a crappy C compiler.

Change-Id: Ieb48f7c0dd0e4e0fb35efffd153b8af62d34ebdf
Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io>
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
2018-07-09 00:18:30 +00:00
Thiago Macieira
f6d9cc5b79 SIMD: Refactor the constants to be actual bit values
... instead of being the bit numbers. This allows us to test more than
one feature at a time with qCpuHasFeature (see commit about the Haswell
architecture features). The drawback is that we won't be able to handle
more than 63 different CPU features, though we're likely quite far from
it (x86 currently has only 36 features).

Change-Id: Iff4151c519c144d580c4fffd153a0acbfd74c2c6
Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io>
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
2018-06-25 18:49:28 +00:00
Thiago Macieira
cf63b0e1df qsimd: add support for new x86 CPU features
This adds detection for: VAES, GFNI, AVX512VBMI2, AVX512VNNI,
AVX512BITALG, AVX512VPOPCNTDQ, AVX512_4NNIW, AVX512_4FMAPS. These
features were found in the "Intel® Architecture Instruction Set
Extensions and Future Features" manual, revision 30. This commit also
adds support for RDPID (already in the main manual) and the Control-flow
Enforcement Technology, which appears in a separate Intel paper.

This new support was done by adding a new generator script so we don't
have to maintain two tables in sync, one in qsimd.cpp with the feature
names, and the other in qsimd_p.h.

Since we now need a lot more bits, it's no longer worth keeping the two
halves of the qt_cpu_features variable mostly similar to the main two
CPUID results. This commit goes back to keeping things in order, like we
used to prior to commit 6a8251a89b6a61258498f4af1ba7b3d5b7f7096c (Qt 5.6)

At the time of this commit, GCC 8 has macros for AVX512VPOPCNTDQ,
AVX512_4NNIW, AVX512_4FMAPS, AVX512VBMI2 and GFNI.

Change-Id: I938b024e38bf4aac9154fffd14f7afae50faaa96
Reviewed-by: Edward Welbourne <edward.welbourne@qt.io>
Reviewed-by: Lars Knoll <lars.knoll@qt.io>
2018-05-05 06:20:07 +00:00