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Replace the Intel Haswell and Ivy Bridge codenames with actual names

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Change-Id: I2a31e96d324dd704e6f96b35ec68c79fd64a090e
Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com>
Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
This commit is contained in:
Thiago Macieira 2013-08-06 16:04:50 -07:00 committed by The Qt Project
parent f8ce891d22
commit d0c8fc3b28
1 changed files with 8 additions and 8 deletions
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16
config.tests/arch/arch.cpp
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@ -103,15 +103,15 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
" avx" " avx"
#endif #endif
#ifdef __AVX2__ #ifdef __AVX2__
// AVX 2, Intel codename "Haswell" // AVX 2, Intel Core 4th Generation ("Haswell")
" avx2" " avx2"
#endif #endif
#ifdef __BMI__ #ifdef __BMI__
// Bit Manipulation Instructions 1, Intel codename "Haswell", AMD "Bulldozer 2" // Bit Manipulation Instructions 1, Intel Core 4th Generation ("Haswell"), AMD "Bulldozer 2"
" bmi" " bmi"
#endif #endif
#ifdef __BMI2__ #ifdef __BMI2__
// Bit Manipulation Instructions 2, Intel codename "Haswell" // Bit Manipulation Instructions 2, Intel Core 4th Generation ("Haswell")
" bmi2" " bmi2"
#endif #endif
#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 #ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
@ -120,11 +120,11 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
" cx16" " cx16"
#endif #endif
#ifdef __F16C__ #ifdef __F16C__
// 16-bit floating point conversion, Intel codename "Ivy Bridge" // 16-bit floating point conversion, Intel Core 3rd Generation ("Ivy Bridge")
" f16c" " f16c"
#endif #endif
#ifdef __FMA__ #ifdef __FMA__
// Fused Multiply-Add with 3 arguments, Intel codename "Haswell", AMD "Bulldozer 2" // Fused Multiply-Add with 3 arguments, Intel Core 4th Generation ("Haswell"), AMD "Bulldozer 2"
// a.k.a. "FMA3" // a.k.a. "FMA3"
" fma" " fma"
#endif #endif
@ -133,7 +133,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
" fma4" " fma4"
#endif #endif
#ifdef __FSGSBASE__ #ifdef __FSGSBASE__
// rdfsgsbase, wrfsgsbase, Intel codename "Ivy Bridge" // rdfsgsbase, wrfsgsbase, Intel Core 3rd Generation ("Ivy Bridge")
" fsgsbase" " fsgsbase"
#endif #endif
#ifdef __LWP__ #ifdef __LWP__
@ -141,7 +141,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
" lwp" " lwp"
#endif #endif
#ifdef __LZCNT__ #ifdef __LZCNT__
// Leading-Zero bit count, Intel codename "Haswell" // Leading-Zero bit count, Intel Core 4th Generation ("Haswell")
" lzcnt" " lzcnt"
#endif #endif
#ifdef __MMX__ #ifdef __MMX__
@ -166,7 +166,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:"
" popcnt" " popcnt"
#endif #endif
#ifdef __RDRND__ #ifdef __RDRND__
// Random number generator, Intel codename "Ivy Bridge" // Random number generator, Intel Core 3rd Generation ("Ivy Bridge")
" rdrnd" " rdrnd"
#endif #endif
#if defined(__SSE__) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1) || defined(_M_X64) #if defined(__SSE__) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1) || defined(_M_X64)