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qsimd_p.h: remove BMI1 feature from the ARCH_HASWELL list

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AMD introduced BMI1 to one of their processor generations before AVX2
and BMI2. Complements a98cf15ed1b57aee695de01b04a974637b2cd44a.

Fixes: QTBUG-107072
Change-Id: I810d70e579eb4e2c8e45fffd1719b15d80d88c10
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
(cherry picked from commit 29d3938aa56663f09666a0ac58b33e70e00abff2)
Reviewed-by: Qt Cherry-pick Bot <cherrypick_bot@qt-project.org>
This commit is contained in:
Thiago Macieira 2022-09-30 09:49:12 -07:00 committed by Qt Cherry-pick Bot
parent 3f87d88ba0
commit 6b5eac4697
1 changed files with 5 additions and 4 deletions
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9
src/corelib/global/qsimd_p.h
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@ -206,14 +206,15 @@ asm(
// The Intel Core 4th generation was codenamed "Haswell" and introduced AVX2,
// BMI1, BMI2, FMA, LZCNT, MOVBE, which makes it a good divider for a
// sub-target for us. The first AMD processor with AVX2 support (Zen) has the
// same features. This feature set was chosen as the version 3 of the x86-64
// ISA (x86-64-v3) and is supported by GCC and Clang.
// same features, but had already introduced BMI1 in the previous generation.
// This feature set was chosen as the version 3 of the x86-64 ISA (x86-64-v3)
// and is supported by GCC and Clang.
//
// macOS's fat binaries support the "x86_64h" sub-architecture and the GNU libc
// ELF loader also supports a "haswell/" subdir (e.g., /usr/lib/haswell).
# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI__ + __BMI2__ + __FMA__ + __LZCNT__)
# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI2__ + __FMA__ + __LZCNT__)
# if ARCH_HASWELL_MACROS != 0
# if ARCH_HASWELL_MACROS != 5
# if ARCH_HASWELL_MACROS != 4
# error "Please enable all x86-64-v3 extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2"
# endif
static_assert(ARCH_HASWELL_MACROS, "Undeclared identifiers indicate which features are missing.");