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build: add riscv64 configure

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v8 had been add riscv64 backend, so i open this
pr to add riscv64 configure.

Refs: https://github.com/nodejs/node/issues/37856

PR-URL: https://github.com/nodejs/node/pull/37980
Fixes: https://github.com/nodejs/node/issues/37856
Reviewed-By: Richard Lau <rlau@redhat.com>
Reviewed-By: Michaël Zasso <targos@protonmail.com>
Reviewed-By: Jiawen Geng <technicalcute@gmail.com>
This commit is contained in:
luyahan 2021-03-29 14:45:47 +09:00 committed by gengjiawen
parent 8d9d8236b7
commit 1d21a8d140
3 changed files with 24 additions and 2 deletions
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2
configure.py
View File

@ -47,7 +47,7 @@ parser = argparse.ArgumentParser()
valid_os = ('win', 'mac', 'solaris', 'freebsd', 'openbsd', 'linux', valid_os = ('win', 'mac', 'solaris', 'freebsd', 'openbsd', 'linux',
'android', 'aix', 'cloudabi') 'android', 'aix', 'cloudabi')
valid_arch = ('arm', 'arm64', 'ia32', 'mips', 'mipsel', 'mips64el', 'ppc', valid_arch = ('arm', 'arm64', 'ia32', 'mips', 'mipsel', 'mips64el', 'ppc',
'ppc64', 'x32','x64', 'x86', 'x86_64', 's390x') 'ppc64', 'x32','x64', 'x86', 'x86_64', 's390x', 'riscv64')
valid_arm_float_abi = ('soft', 'softfp', 'hard') valid_arm_float_abi = ('soft', 'softfp', 'hard')
valid_arm_fpu = ('vfp', 'vfpv3', 'vfpv3-d16', 'neon') valid_arm_fpu = ('vfp', 'vfpv3', 'vfpv3-d16', 'neon')
valid_mips_arch = ('loongson', 'r1', 'r2', 'r6', 'rx') valid_mips_arch = ('loongson', 'r1', 'r2', 'r6', 'rx')

7
tools/v8_gypfiles/toolchain.gypi
View File

@ -273,6 +273,13 @@
}], }],
], ],
}], }],
['v8_target_arch=="riscv64"', {
'defines': [
'V8_TARGET_ARCH_RISCV64',
'__riscv_xlen=64',
'CAN_USE_FPU_INSTRUCTIONS'
],
}],
['v8_target_arch=="s390x"', { ['v8_target_arch=="s390x"', {
'defines': [ 'defines': [
'V8_TARGET_ARCH_S390', 'V8_TARGET_ARCH_S390',

17
tools/v8_gypfiles/v8.gyp
View File

@ -274,6 +274,11 @@
'<(V8_ROOT)/src/builtins/mips/builtins-mips.cc', '<(V8_ROOT)/src/builtins/mips/builtins-mips.cc',
], ],
}], }],
['v8_target_arch=="riscv64" or v8_target_arch=="riscv64"', {
'sources': [
'<(V8_ROOT)/src/builtins/riscv64/builtins-riscv64.cc',
],
}],
['v8_target_arch=="mips64" or v8_target_arch=="mips64el"', { ['v8_target_arch=="mips64" or v8_target_arch=="mips64el"', {
'sources': [ 'sources': [
'<(V8_ROOT)/src/builtins/mips64/builtins-mips64.cc', '<(V8_ROOT)/src/builtins/mips64/builtins-mips64.cc',
@ -686,6 +691,11 @@
'<!@pymod_do_main(GN-scraper "<(V8_ROOT)/BUILD.gn" "\\"v8_base_without_compiler.*?v8_current_cpu == \\"mips\\".*?sources \+= ")', '<!@pymod_do_main(GN-scraper "<(V8_ROOT)/BUILD.gn" "\\"v8_base_without_compiler.*?v8_current_cpu == \\"mips\\".*?sources \+= ")',
], ],
}], }],
['v8_target_arch=="riscv64"', {
'sources': [ ### gcmole(arch:riscv64) ###
'<!@pymod_do_main(GN-scraper "<(V8_ROOT)/BUILD.gn" "\\"v8_base_without_compiler.*?v8_current_cpu == \\"riscv64.*?sources \+= ")',
],
}],
['v8_target_arch=="mips64" or v8_target_arch=="mips64el"', { ['v8_target_arch=="mips64" or v8_target_arch=="mips64el"', {
'sources': [ ### gcmole(arch:mips64el) ### 'sources': [ ### gcmole(arch:mips64el) ###
'<!@pymod_do_main(GN-scraper "<(V8_ROOT)/BUILD.gn" "\\"v8_base_without_compiler.*?v8_current_cpu == \\"mips64\\".*?sources \+= ")', '<!@pymod_do_main(GN-scraper "<(V8_ROOT)/BUILD.gn" "\\"v8_base_without_compiler.*?v8_current_cpu == \\"mips64\\".*?sources \+= ")',
@ -764,7 +774,7 @@
}], }],
# Platforms that don't have Compare-And-Swap (CAS) support need to link atomic library # Platforms that don't have Compare-And-Swap (CAS) support need to link atomic library
# to implement atomic memory access # to implement atomic memory access
['v8_current_cpu in ["mips", "mipsel", "mips64", "mips64el", "ppc", "arm"]', { ['v8_current_cpu in ["mips", "mipsel", "mips64", "mips64el", "ppc", "arm", "riscv64"]', {
'link_settings': { 'link_settings': {
'libraries': ['-latomic', ], 'libraries': ['-latomic', ],
}, },
@ -1410,6 +1420,11 @@
'<(V8_ROOT)/src/heap/base/asm/mips64/push_registers_asm.cc', '<(V8_ROOT)/src/heap/base/asm/mips64/push_registers_asm.cc',
], ],
}], }],
['_toolset == "host" and host_arch == "riscv64" or _toolset == "target" and target_arch=="riscv64"', {
'sources': [
'<(V8_ROOT)/src/heap/base/asm/riscv64/push_registers_asm.cc',
],
}],
] ]
}], }],
['OS=="win"', { ['OS=="win"', {