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sync0sync.ic Use XCHG also to reset the mutex lock word: it makes a serialization point to code on Intel and gives more safety

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innobase/include/sync0sync.ic:
  Use XCHG also to reset the mutex lock word: it makes a serialization point to code on Intel and gives more safety
BitKeeper/etc/logging_ok:
  Logging to logging@openlogging.org accepted
This commit is contained in:
unknown 2001-05-31 15:23:40 +03:00
parent 8c8244918f
commit 7176e43d21
2 changed files with 20 additions and 5 deletions
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1
BitKeeper/etc/logging_ok
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@ -1,3 +1,4 @@
jani@janikt.pp.saunalahti.fi
monty@hundin.mysql.fi
mwagner@evoq.mwagner.org
heikki@donna.mysql.fi

24
innobase/include/sync0sync.ic
View File

@ -94,10 +94,12 @@ mutex_test_and_set(
/* In assembly we use the so-called AT & T syntax where
the order of operands is inverted compared to the ordinary Intel
syntax. The 'l' after the mnemonics denotes a 32-bit operation. */
syntax. The 'l' after the mnemonics denotes a 32-bit operation.
The line after the code tells which values come out of the asm
code, and the second line tells the input to the asm code. */
asm volatile("movl $1, %%eax; xchgl (%%ecx), %%eax" :
"=eax" (res):
"=eax" (res), "=m" (*lw) :
"ecx" (lw));
return(res);
#else
@ -132,12 +134,24 @@ mutex_reset_lock_word(
__asm MOV EDX, 0
__asm MOV ECX, lw
__asm XCHG EDX, DWORD PTR [ECX]
#elif defined(__GNUC__) && defined(UNIV_INTEL_X86)
ulint* lw;
lw = &(mutex->lock_word);
/* In assembly we use the so-called AT & T syntax where
the order of operands is inverted compared to the ordinary Intel
syntax. The 'l' after the mnemonics denotes a 32-bit operation. */
asm volatile("movl $0, %%eax; xchgl (%%ecx), %%eax" :
"=m" (*lw) :
"ecx" (lw) :
"eax"); /* gcc does not seem to understand
that our asm code resets eax: tell it
explicitly that after the third ':' */
#else
mutex->lock_word = 0;
#if !(defined(__GNUC__) && defined(UNIV_INTEL_X86))
os_fast_mutex_unlock(&(mutex->os_fast_mutex));
#endif
#endif
}
/**********************************************************************