1berry/MariaDB-server
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MDEV-25807: ARM build failure due to missing ISB instruction on ARMv6

Browse Source 
Debian has support for 3 different arm machine and probably one which is
failing is a pretty old version which doesn't support the said instruction.

So we can make it specific to _aarch64_ (as per the arm official reference
manual ISB should be defined by all ARMv8 processors). [as per the ARMv7 specs
even 32 bits processor should support it but not sure which exact version
Debian has under armel].

In either case, the said performance issue will have an impact mainly with a
high-end processors with extreme parallelism so it safe to limit it to _aarch64_.

Corrects: MDEV-24630
This commit is contained in:
Krunal Bauskar 2021-06-01 09:09:56 +10:00 committed by Daniel Black
parent 0d44792a83
commit 2a4f72b7d2
1 changed files with 8 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
include/my_cpu.h
View File

@ -84,7 +84,15 @@ static inline void MY_RELAX_CPU(void)
__ppc_get_timebase(); __ppc_get_timebase();
#elif defined __GNUC__ && (defined __arm__ || defined __aarch64__) #elif defined __GNUC__ && (defined __arm__ || defined __aarch64__)
/* Mainly, prevent the compiler from optimizing away delay loops */ /* Mainly, prevent the compiler from optimizing away delay loops */
#ifdef _aarch64_
__asm__ __volatile__ ("isb":::"memory"); __asm__ __volatile__ ("isb":::"memory");
#else
/*
some older 32 bits processor doesn't support isb but as per
arm-v8 reference manual all armv8 processor should support isb.
*/
__asm__ __volatile__ ("":::"memory");
#endif
#else #else
int32 var, oldval = 0; int32 var, oldval = 0;
my_atomic_cas32_strong_explicit(&var, &oldval, 1, MY_MEMORY_ORDER_RELAXED, my_atomic_cas32_strong_explicit(&var, &oldval, 1, MY_MEMORY_ORDER_RELAXED,